Using Formal Verification for Design Exploration | Synopsys
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Using Formal Verification for Design Exploration | Synopsys
Jia Zhu, Formal Verification Manager at AMD and leader of the central formal verification team for AMD's next generation GPU, sits down with Synopsys to talk about why RTL designers should be using formal verification for design exploration. Learn more about Synopsys: https://www.synopsys.com/ Subscribe: https://www.youtube.com/synopsys Follow ...
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1.6K views · 33 reactions | Utilizing Ansys power integrity and reliability signoff technologies, Synopsys is advancing chip design to enable the next generation of high-performance products. Discover how this partnership helps Synopsys tackle a range of novel physical effects, from thermal analysis to electromagnetic interference and advanced 3D layout capabilities. #chipdesign #simulation | Ansys | Facebook
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