Circuit Design of a 4-bit Binary Counter Using D Flip-flops - VLSIFacts

(c) Develop a MOD 5 asynchronous up counter using J-K flip-flop. (i) Draw the logic circuit. (5 marks) (i) Draw the waveform timing diagram and obtain the sequence of the numbers. In the timing diagram indicate the time instance when the counter is RESET to achieve MOD 5. (5 marks) [C5, CO4] (Total: 25 marks)

Batch Apex Syntax & Best Practices